Career

Kasura is passionate about becoming the industry leading vendor for SystemC and SystemVerilog services. At Kasura, one not only cultivates deep technical expertise in these fields but also derives encouragement from peers to ideate and innovate. Kasura strongly relies on people who are naturally inclined and inquisitive about technology to realise its goals.

Should you feel equally passionate and responsible about technology, Kasura welcomes you to be part of its journey. We have the following open positions at our Bangalore location

Mail your resumes to careers@kasura.com

Member-Technical Staff

Responsibilities

• Develop behavioral models in C++ and/or SystemC
• Specify, develop, or enhance the verification environment, transactors/ checkers and/or bus functional models
• Develop regressable, self-checking test suites
• Debug the design and isolate failures

Requirements

• 2+ years experience in logical verification of ASICs and systems
• Experience with C, C++ and SystemC
• Experience in Verilog and VHDL is a plus
• Experience in developing C/C++/SystemC based behavioral models on Linux, Solaris and Windows platforms
• Experience in writing test plans for ASICs / SoCs including embedded processors
• Experience in implementing test suites and isolating failures
• Experience with embedded processors, DSPs, and/or standard busses is a plus
• Experience with Software Co-simulation is a plus
• Excellent software engineering skills, including programming style and documentation

Senior Member-technical Staff

Responsibilities

• Determine logical verification strategy and approach for a particular ASIC, SoC or any complex system
• Develop behavioral models in C++ and/or SystemC
• Write the verification test plan
• Specify, develop, or enhance the verification environment, checkers and/or bus functional models
• Develop regressable, self-checking test suites
• Debug the design and isolate failures

Requirements

• 4+ years experience in logical verification of ASICs and systems
• Experience with C, C++ and SystemC
• Experience in Verilog and VHDL is a plus
• Experience in developing C/C++/SystemC based behavioral models on Linux, Solaris and Windows platforms
• Demonstrated skills in applying reusability to the design and implementation of Verification suites
• Have successfully defined, development, and used multiple verification environments, using a variety of methodologies and techniques
• Experience in transferring verification environments and test suites to others, and supporting their use
• Experience in writing test plans for ASICs / SoCs including embedded processors
• Experience in implementing test suites and isolating failures
• Experience with embedded processors, DSPs, and/or standard busses is a plus
• Experience with Software Co-simulation is a plus
• Excellent software engineering skills, including programming style, configuration and release management, and documentation
• Ability to handle a team independently and identify the best solution among best practices, based on personal experience

Project Manager

Responsibilities

• Analysis and troubleshooting
• Design & development of re-usable System level modeling IP components and verification environments
• Builds, leads and manages a team; handling recruitment, career development, day-to-day tasks management, performance appraisals
• Customer interaction and presales activities
• Manage project life cycle and bug free deliverables
• Strong documentation skills
• Process oriented
• Attention to detail
• Ability to lead a team
• Meeting deadlines

Requirements

• 5+ years experience in managing projects in logical verification of ASICs, DSPs, processor architectures and other systems
• Excellent knowledge of System level modeling and verification concepts
• Sound knowledge of C++ and SystemC
• Excellent communication & interpersonal skills
• Exposure to SEI-CMM standards
• Strong analytical skills
• Sound knowledge of Linux based environments
• Ability to meet deadlines

Mail your resumes to careers@kasura.com